1. Field of the Invention
This invention relates to the fabrication of a multilayer circuit substrate structure, and more particularly, to the process for uniformly metallizing the interlayer electrical interconnecting paths.
2. Description of the Prior Art
In the production of printed circuits, many methods have been used to provide electrical connections through the circuit boards, substrates, or the like. The actual connectors have included such means as conductive inserts to plated through-holes, often referred to as "vias." The multilayer printed circuit board manufacture and the coating of the walls of the through-holes or "vias" can be accomplished by a number of known processes, as for example, those described in U.S. Pat. Nos. 3,319,317 and 3,739,469 assigned to the same assignee as this application, and as well as U.S. Pat. No. 3,436,819.
In present day technology and with the transition to use of ceramic materials in the manufacture of substrates, patents are issuing which are directed to the manufacture of ceramic bases, the circuitry packaging and the interconnecting circuitry for such packages. For example, U.S. Pat. No. 3,200,298 disclosed integrated and hybrid semiconductor and thin film circuits utilizing multilayer supercooled liquid or ceramic wafer assemblies as a substrate material. U.S. Pat. No. 3,360,852 relates to ceramic bases suitable for mounting electrical circuit elements and to a method for making such bases. U.S. Pat. No. 3,423,517 discloses a microelectronic circuit device having circuitry encapsulated within a sintered monolithic ceramic body formed by metallizing the ceramic prior to firing in a reducing atmosphere. U.S. Pat. No. 3,634,600 discloses a ceramic package bearing an electrically conducting pattern and adapted to receive diminutive electronic components such as semiconductor elements and which includes metallic plugs in the conducting pattern to serve as islands to which the internal lead connections are made.
Formation of electrical connections between two or more planes of circuitry within ceramics has always been an area of interest and the significance intensifies as the need for an increased number of layers are necessary to meet more extensive requirements of present day technology. A method that successfully accomplishes interplanar connections is one in which solid "vias" are made out of past in each green ceramic layer followed by a stacking of layers, lamination, and firing. However, there are applications where solid "vias" are not adequate and a need for hollow type connections becomes imminent.